[Qustion]זיכרון

[IatrafRulz]

i know a fair bit about gpus, cpus and alot of things but not RAM. so i have a couple questions.

what is this 1:1 ratio i keep hearing about? y is it important?

amd's have a built in memory controller which makes sum ram slower than it should normally run. is this the same with c2d's?
and im not sure it this is true that faster memory is more crucial with amd's than core2duo's. y is this?

[Kirill17]

To get you oriented, the two main aspects to memory performance are latency and throughput. Latency measures the wait between the request for data from a new block of memory and when the data starts appearing; throughput measures the rate at which it appears once it has started.
As with hard disks, the initial wait is much longer than the wait for further data from consecutive locations.
Memory bus throughput is typically given as a DDR or DDR2 "speed". Since those technologies transfer two units of data per clock tick, the actual memory clock speed is 1/2 the DDR number. For example, DDR2-667 has a 333MHz memory clock speed.
Latency is typically measured in clock ticks, which are just 1/memory clock speed. That means that a 4-clock latency on memory running at DDR2-800 is the same amount of time as 2 clocks on memory running at DDR2-400.

The faster the throughput and/or latency, the more expensive the RAM. Different system designs work best with different tradeoffs on latency and throughput. For example, in Intel LGA775 designs, data from memory first goes to the northbridge's memory controller, then through the FSB to the CPU. Whichever of these two buses has the lower bandwidth will limit the overall memory-CPU bandwidth. Until recently, the memory bus was usually the limit on overall throughput.
In recent years, dual-channel memory controllers have become standard. These essentially double the memory-controller throughput by adding a 2nd memory controller/bus running in parallel to the first. This advance has tipped the balance to the point that the controller-CPU bus is now often the limit on memory throughput, at least for Intel CPUs.

Another major factor is the CPU. Different CPU architectures seem to have different optimum tradeoffs between memory latency and throughput. This has to do with the internal CPU architecture, the degree of pipelining, the sizes of the CPU caches, the number of cores, etc. One major design difference on current higher-end AMD CPUs is that the memory controllers are built into the CPU, allowing a higher controller-CPU bandwidth. Thus, for AMD CPUs, the overall throughput is often limited by the memory bus bandwidth.